Digital System Design I
- PMARINA
- Jan 22, 2020
- 1 min read
This is a blog post! I will be using this website/blog to record my progress as I learn VHDL/Verilog on the Nexys A7 (Arctix-7).
You can view my work here.
To download my code to your computer (git with HTTPS):
Alternatively, (git with SSH):
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